SOP / TO Series Plastic Encapsulated IC Packages with Exposed Heatsink

• Material Form: Die / Wafer (Support for 6-inch, 8-inch, 12-inch wafers)
• Chip Size Capability: 0.45 x 0.45 mm to 10.00 x 10.00 mm (Thickness: ≥ 0.15 mm, Kerf Width: ≥ 60 um)
• Bonding Pad Requirements: Min. Pad Size 50 um / Min. Pad Pitch 55 um / Min. Thickness 0.80 um
• Die Attachment: Solder, Conductive/Insulating Adhesive, and DAF Bonding (Max. Sideway Overflow: 0.25 mm)
• Wire Bonding: Cu / Au (20-50 um) or Al (20-500 um) with ≥ 0.10 mm loop height control
• Lead Frame & Plating: Lp tolerance control 0.10 to 0.15 mm; Pure Tin plating (5 to 12 um thickness)
• Advanced Support: Support for Chip Stacking, Multi-Chip Packaging (MCP), and laser marking (depth ≤ 80 um)

• TO Series: TO-220-7, TO-263-7 (TO-247-3/4 roadmap included)
• SOP Series: SOP-20, SOP-24, SOP-44
• Target Application: Power Amplifiers (PA)
• Target Application: Electric Drive Systems
• Target Application: Power Management Modules (PMIC)

Leveraging our extensive library of in-house precision molds, we offer cavity-matching logic for significant cost optimization. Many designs requiring lower pin-counts (e.g., 10-pin or 20-pin) can be effectively accommodated within our standard higher-pin-count housings (such as SOP-44). This approach drastically reduces lead times and initial NRE investment. Full custom mold development is also available. Consult our application engineers to optimize your design and align your project budget with existing tooling.